Specifications

Computer Architecture and Maintenance (G-Scheme-2014)

Operation

Let us suppose that the system has cache of three levels (level means that overall

cache memory is split into different hardware segments which vary in their processing

speed and memory). From RAM data is transferred into cache of 3

level (L3 cache). L3

cache is a segment of overall cache memory. L3 cacheis faster than RAM but slower

then L2 cache. To further fasten up the process cache of second order L2 cache are used.

They are located at immediate vicinity of processor. But in some of the modern

processors L2 cache is inbuilt making the process faster. It should be noted that it is not

necessary that a system has 3 levels of cache; it might have 1 or 2 level of cache. At the

core level is cache of first level that is L1 cache memory. The commonly used

commands/instructions/data is stored in this section of memory. This is built in the

processor itself. Thus this is fastest of all the cache memory.

Q.What is Cache State its Purpose?Describe type of cache ? State advantage of cache

Ans.The cache is a smaller, faster memory which stores copies of the data from the

most frequently used main memory locations. As long as most memory accesses are to

cached memory locations, the avenge latency of memory accesses will be closer to the

cache latency than to the latency of main memory.

Prepared By – Prof. Manoj.kavedia (9860174297 – 9324258878 ) (www.kavediasir.yolasite.com)