User guide

23-53
SystemVerilog Assertion Constructs
fcov_grade_instances -target value1
-metric code [-timeLimit value2]
string Returns a list of the minimum set of
tests that add up to the target value
for the metric code. Each test is
accompanied by the accumulated
coverage value including that test.
The grading is by instance.
fcov_grade_modules -target value1
-metric code [-timeLimit value2]
string Returns a list of the minimum set of
tests that add up to the target value
for the metric code. Each test is
accompanied by the accumulated
coverage value including that test.
The grading is by module.
fcov_is_cover_prop -assertion handle int Returns 1 if the assertion is the cover
directive for the property.
fcov_is_cover_seq -assertion handle int Returns 1 if the assertion is the cover
directive for the sequence.
fcov_load_design -file name empty
string ““
Unloads any existing design and
data, including all name maps. Then
loads a design with the specified
path name. (The search rules are
described in the table for options.)
fcov_load_test -file name empty
string ““
Loads a test with the specified name.
The name can be a file name or full
path name. (The search rules are
described in the table for options.)
fcov_load_test_grade -file name empty
string ““
Loads a file with the specified name
for coverage grading. The name can
be a file name or full path name. (The
search rules are described in the
table for options.)
fcov_map_hier -from hier_name -to
hier_name
empty
string ““
Maps coverage of instance (and the
hierarchy under it) with the specified
hierarchical name hier_name to
another instance for all subsequent
merges.
fcov_set -bin handle -coverage int empty
string ““
Sets the coverage count int for the
bin with the specified handle. It can
be 0 or the count of the times the bin
was covered.
Command Return
Value
Description