User guide

23-35
SystemVerilog Assertion Constructs
Note that if VCS duplicates the SVA local variable, the returned
vpi_attempt_info structure contains the handle to the new local
variable. Your application needs to keep track of all copies of local
variable for a particular attempt.
These callback types have the following limitations:
• The name or fullname of the SVA local variable does not contain
the name of sequence or property it is declared in.
• The local variable handle supports only vpiType, vpiName,
vpiFullName and getValue. There is no support for other
properties defined on normal VPI variables.
• VCS treats XMR (cross module reference) SVA local variables as
normal SVA local variables, so you cannot get the XMR part in
the local variable name. vpiFullName considers the sequence or
property instantiated as if it is declared in the scope containing
the assertion.
• Change in part of a variable, for example a one bit change in a
vector results in a callback of the full variable. Your application is
responsible for identifying the changed part.
• No debug support for structure/union/classes in the initial
implementation. Your application can get callbacks on other local
variables in the assertion. VCS ignores only unsupported callback
types.
Controlling How VCS Uses SystemVerilog Assertions
You use compile-time and runtime options to control SystemVerilog
in VCS. Together with system tasks, these options allow you to use
all the features described in the following sections.