User guide

23-11

SystemVerilog Assertion Constructs

Intersecting Sequences (And With Length Restriction)

You use intersect operator to specify the match of the operand

sequential expressions at the same clock tick. For example:

sequence s1;

l1 ##1 l3;

endsequence

sequence s2;

l2 ##1 l4;

endsequence

sequence s3;

s1 intersect s2;

endsequence

In this example, sequence s3 can match because sequences s1 and

s2 both have the same number of clock ticks, sequence s3 does

match when sequences s1 and s2 match.

Oring Sequences

You can use the or operator to specify that one of two sequences

must succeed. The following is an example:

sequence s1;

sig1 ##1 sig2;

endsequence

sequence s2;

sig3 ##2 sig4;

endsequence

sequence s3;

s1 or s2;

endsequence