User guide

2-22
Modeling Your Design
Modeling Faster always Blocks
Whether VCS infers an always block to be a sequential device or
not, there are modeling techniques you should use for faster
simulation.
Place All Signals Being Read in the Sensitivity List
The sensitivity list for an always block is the event control that
immediately follows the always keyword. Place all nets and
registers, whose values you are assigning to other registers, in the
always block, and place all nets and registers, whose value changes
trigger simulation events, in the sensitivity list control.
Use Blocking Procedural Assignment Statements
In VCS blocking procedural assignment statements are more
efficient.
Synopsys recommends zero delay nonblocking procedural
assignment statements to avoid race conditions.
IEEE Std 1364-2001 describes blocking and nonblocking procedural
assignment statements on pages 119-124.
Avoid force and release Procedural Statements
IEEE Std 1364-2001 defines these statements on pages 126-127. A
few occurences of these statements in combinatorial always blocks
does not noticeably slow down simulation but their frequent use does
lead to a performance cost.