User guide

2-20
Modeling Your Design
@ (posedge clk) q <=d;
Even though clk is in an event control, it is not in the sensitivity
list event control.
• VCS does not infer the following latch to be a sequential device:
always begin
wait clk; q <= d; @ d;
end
There is no sensitivity list event control.
• VCS infers the following latch to be a sequential device:
always @ (clk or d)
if (clk) q <= d;
The sequential controls, clk and d, are in the sensitivity list event
control.
Avoid Level Sensitive Sensitivity Lists Whose Signals are Used
“Completely”
VCS infers a combinational device instead of a sequential device if
the following conditions are both met:
• The sensitivity list event control is level sensitive
A level sensitive event control does not contain the posedge or
negedge keywords.
• The signals in the sensitivity list event control are used
“completely” in the always block
Used “completely” means that there is a possible simulation event
if the signal has a true or a false (1 or 0) value.