User guide

22-44
SystemVerilog Design Constructs
4. If the value of in2 is not zero, the value of the local variable funcint
is returned by the function.
#1 reg2=outgo(reg1,log1,int2);
In this statement that calls the function (SystemVerilog function calls
are expressions unless they are void functions), signal reg2 is
assigned the return value of the function. Signals reg1 and log1 input
values to the function and the value of the output port is a structural
driver of signal int2.
SystemVerilog also allows void functions that do not have a return
value. A void function is called as a statement not as an expression,
as it is in non-void functions. The following is an example of a void
function and the code that calls it:
function void display(bit in1);
bit funcbit;
funcbit=in1;
$display("bit1=%0b",funcbit);
//return 1’bz;
endfunction
initial
begin
bit1=1;
display(bit1);
end
A void function cannot contain a return statement.
Passing Arguments by Setting Defaults
You can specify default initial values for function and task ports.
Default values can be constants or expressions, cross-module
references, or class-references.