User guide

22-30
SystemVerilog Design Constructs
s_vpi_value value_s = {vpiIntVal};
value_s.value.integer = 7;
.
.
.
vpi_put_value(var, &value_s, NULL, flag);
.
.
.
}
void releaseX()
{
vpiHandle var;
int flag = vpiReleaseFlag;
s_vpi_value value_s = {vpiIntVal};
value_s.value.integer = 70;
.
.
.
vpi_put_value(var, &value_s, NULL, flag);
.
.
.
}
At time 40 ns, another PLI call $releaseX is called, which will release
the previously forced object.
With respect to the behavior, an object can be forced from within
SystemVerilog and released from PLI or vice versa. Otherwise both
force and release can happen from PLI. In all these cases the
behavior of force and release would be the same as SystemVerilog
force and release. All the rules that govern the force and release on
various data types from within SystemVerilog code will also apply to
VPI force and release.
SystemVerilog Operators
SystemVerilog includes the other assignment operators in C: