User guide

22-10
SystemVerilog Design Constructs
Expression: expression
"filename", line_number
Structures and Unions
You can declare C-like structures and unions. The following are some
examples of structures:
struct { logic [31:0] lg1; bit [7:0] bt1; } st1;
struct {
bit [2:0] bt2;
struct{
shortint st1;
longint lg1;
} st2;
} st3;
In these three structures:
• The first structure is named st1 and it contains a 32 bit logic
variable named lg1 and an 8 bit bit variable named bt1.
• The second structure named st3 contains a structure named st2.
Structure st3 also contains a bit variable named bt2.
• Structure st2 contains a shortint variable named st1 (same
name as the first structure, this is okay because structure st1 is
not in the same hierarchy as shortint st1 but it is not
recommended). Structure st2 contains a longint variable
named lg1. Notice there is also an lg1 in structure st1.
You can assign values to and from the members of these structures
using the structure names as the building blocks of hierarchical
names. For example:
initial
begin