User guide

21-84
OpenVera Native Testbench
base type of the enum (an integral type) and then the bit-vector
conversion rules (section 2.5) are applied to convert to an OpenVera
type. This is illustrated in the following example.
// SystemVerilog
typedef reg [7:0] formal_t; // SV type equivalent to
// 'reg [7:0]' in OV
typedef enum reg [7:0] { red = 8'hff, blue = 8'hfe,
green = 8'hfd } color;
// Note: the base type of color is 'reg [7:0]'
typedef enum bit [1:0] { high = 2'b11, med = 2'b01,
low = 2'b00 } level;
color c;
level d = high;
Foo foo;
...
foo.vera_method(c); // OK: formal_t'(c) is passed to
// vera_method.
foo.vera_method(d); // OK: formal_t'(d) is passed to
// vera_method.
// If d == high, then 8'b00000011 is
// passed to vera_method.
// OpenVera
class Foo {
...
task vera_method(reg [7:0] r) {
...
}
}
The above data type conversion does not involve a conversion in
data representation. An enum can be passed by reference to
OpenVera code but the formal argument of the OpenVera method
must exactly match the enum base type (for example: 2-to-4 value
conversion, sign conversion, padding or truncation are not allowed
for arguments passed by reference; they are OK for arguments
passed by value).