User guide

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OpenVera Native Testbench
files if the latter are marked as encrypted-mode by naming them with
extensions .vrp, .vrhp, or additional extensions specified using
option –ntb_vipext. This implies that the extensions are
considered OpenVera extensions similar to using -ntb_filext for
unencrypted files. This causes those files and everything they
include to be preprocessed in encrypted mode.
Testbench Functional Coverage
As chip designs grow more complex and testing environments
become increasingly sophisticated, the emphasis is on testing the
chip completely. With hundreds of possible states in a system and
thousands of possible transitions, the completeness of tests must be
a primary focus of any verification tool.
Traditional coverage models use a code coverage methodology.
They check that specific lines of code are executed at some point in
the simulation. However, this method has inherent flaws. For
instance, you can be certain that a device entered states 1, 2 and 3,
but you cannot be certain that the device transitioned from state 1 to
2 to 3 in sequence. Even such a simple example displays the
limitations of code coverage methodology. With a sophisticated chip,
such an approach is not adequate to ensure the integrity of the
design.
VCS supports a functional coverage system. This system is able to
monitor all states and state transitions, as well as changes to
variables and expressions. By setting up a number of monitor bins
that correspond to states, transitions, and expression changes, VCS
is able to track activity in the simulation.