User guide

21-29
OpenVera Native Testbench
Example
% simv +ntb_load=test1/libtb.so
Limitations
• The hdl_task inst_path specification should begin with a top-level
module (that is, not the DUT module name).
• When the hdl_task declaration has a var parameter, the
corresponding task port in the DUT side must be “inout” (that is,
it cannot be “output”).
• The port direction and size in the hdl_task specification must
match the corresponding task in the DUT.
• You cannot rely on port-coercion to happen for hdl_tasks to
correct the direction based on usage. For example, if one of the
hdl_tasks port directions is specified as an input but is actually
used as output, then it may not be able to be coerced into
behaving as an output in the separate compile mode.
•
Compile-time Options
The following options can be used on the VCS command line for
Native Testbench, whether compiling the testbench with the design,
or separately from the design:
-ntb
Invokes Native Testbench.