User guide

20-53
Using OpenVera Assertions
Note:
In all syntax styles, you can also split a pragma statement into
separate lines as follows:
//ova bind
//ova unit_name [instance_name]
//ova [#(parameter1, ..., parameterN)]
//ova [(port1, ..., portN)];
The following example shows how to instantiate a checker, called
ova_one_hot, from the OVA Checker Library:
module test();
reg [3:0] x;
wire clk;
wire a,b;
wire error;
// other verilog code
// ova bind ova_mutex (1'b1,clk,a,b);
/* ova bind
ova_forbid_bool (error,clk);
*/
// ova_begin bind
// ova_one_hot
// #(0, // strict
// 4) // bit width
// (1'b1, // enable
// clk, // clock
// x); // data
// ova_end
// other verilog code
endmodule // module test
Uses a single-line, C style pragma to instantiate the
ova_mutex checker from the Checker Library, and
checks for mutual exclusive of a and b.
Uses a multi-line C++ style
pragma to instantiate
ova_forbid_bool, and check that
an error is never asserted.
Uses a multi-line modified C++
style pragma to instantiate
ova_one_hot and checks that
signal x has only 1 bit.