User guide

20-52
Using OpenVera Assertions
Unit Instantiation Using the Unit-Based Checker Library
The easiest and most efficient method to inline OVA is to instantiate
a unit-based checker from the OVA Checker Library (For more
information on the Checker Library, see the OpenVera Assertions
Checker Library Reference Manual). The context of the checker is
automatically inferred based upon the location of the OVA pragma
statement within a module of Verilog code. To use this method, you
must include the bind keyword within a valid OVA pragma statement.
The syntax options for specifying unit-based assertions are as
follows:
C++ Style:
/* ova
bind unit_name [ inst_name] [#(param1, ..., paramN)] [(port1, ..., portN)];
*/
Modified C++ Style:
//ova_begin
//bind unit_name [inst_name] [#(param1, ..., paramN)] [(port1, ..., portN)];
//OVA_END
*/
C Style:
// ova bind unit_name [inst_name] [#(param1, ..., paramN)] [(port1, ..., portN)];