User guide

20-11
Using OpenVera Assertions
Consider rephrasing the expression using for instance a disjunction,
e.g., if m is 0 then (a*[1..n] #k b) || (#(k-1) b);
GR8: WARNING "matched" used in the same clock domain
(one clock tick delay)
Example:
clock posedge clk {
event e1: ... ;
event e2: if matched e1 then ... ;
}
The successful match on "e1" would only be detected in "e2" at the
subsequent posedge of "clk". Consider changing "e2" as follows:
event e2: if ended e1 then ... ;
The "ended" operator transfers the match of "e2" to "e2" at the same
"posedge clk".
GR11: RECOMMENDATION event contains a large delay
or repetition interval.
Example:
event e1: if posedge a then a*[1..1000] #1 b;
or
event e2: a #[1..10000] b;
or
event e3: a #10000 b;
Consider using a variable to count clock ticks if there are no
overlapped transactions. For example, the first case:
logic [9:0] cnt = 11'b0;
clock ... {
cnt <= reset ? 10'd0 :