User guide

19-34
Using the VCS / SystemC Cosimulation Interface
The direction field specifies the caller and callee language
domains, and defaults to sv_calls_sc. The SystemC calling
SystemVerilog direction is indicated by sc_calls_sv.
The verilog_adapter and systemc_adapter fields are optional
and define the names of the generated TLI adapters and the
corresponding file names. File extension .sv is used for the
verilog_adapter and file extensions .h and .cpp for the
systemc_adapter.
The optional #include lines are inserted literally into the generated
SystemC header file, and the optional `include lines into the
generated SystemVerilog file.
The hdl_path field is optional and binds the generated Verilog
adapter through an XMR to a fixed Verilog module, Verilog interface
or class instance. Using hdl_path makes it easier to connect to a
specific entity, however, the adapter can be instantiated only once,
not multiple times. If you want to have multiple connections, then
create multiple adapters which differ only by their name.
A SystemC method may or may not be blocking, meaning it may
consume simulation time before it returns or return right away. This
distinction is important for the generation of the adapter. Use task
for SystemC methods that are blocking or even potentially blocking.
Use function for SystemC methods that will not block for sure. Note
that functions enable faster simulation than tasks.
The lines after task or function define the formal arguments of
the interface method. This is done in SystemVerilog syntax. This
means that types of the arguments must be valid SystemVerilog
types. See “Supported Data Types of Formal Arguments” on page
19-40 for more details.