User guide

1-14
Getting Started
Basic Compile-Time Options
This section outlines some of the basic compile-time options you can
use to control how VCS compiles your Verilog source files. Detailed
descriptions and usage instructions for all compile-time options are
available in Chapter 3, "Compiling Your Design" and Appendix B,
"Compile-Time Options".
-cm [line|cond|fsm|tgl|path|branch]
Specifies compiling for the specified type or types of coverage.
The arguments specify the types of coverage:
line
Compile for line or statement coverage.
cond
Compile for condition coverage.
fsm
Compile for FSM coverage.
tgl
Compile for toggle coverage.
path
Compile for path coverage.
branch
Compile for branch coverage.
If you want VCS to compile for more than one type of coverage,
use the plus (+) character as a delimiter between arguments. For
example:
-cm line+cond+fsm+tgl