User guide

19-19
Using the VCS / SystemC Cosimulation Interface
-Mdir=directory_path
Works the same way that the -Mdir VCS compile-time option
works. If you are using the -Mdir option with VCS, you should
use the -Mdir option with vlogan to redirect the vlogan output
to the same location that VCS uses.
-V
Displays code generation and build details. Use this option if you
are encountering errors or are interested in the flow that builds
the design.
To generate the wrapper and interface files for a Verilog module
named adder, in a Verilog source file named adder.v, instantiated
in SystemC code in top.cpp, you would enter the following:
vlogan -sc_model adder -sc_portmap the.map adder.v
Instantiating the Wrapper
You instantiate a Verilog module in your SystemC code like a
SystemC module. For example, consider the following Verilog
module in a file called adder.v:
module adder (value1, value2, result);
input [31:0] value1;
input [31:0] value2;
output [31:0] result;
reg [31:0] result_reg;
always @(value1 or value2)
begin
result_reg <= value1 + value2;
end
assign result = result_reg;
endmodule