User guide

19-14
Using the VCS / SystemC Cosimulation Interface
Compiling a Verilog Design Containing SystemC
Modules
To compile your Verilog design, include the -sysc compile-time
option. For example:
vcs -sysc tb.v display.v
When you compile with this option, VCS looks in the csrc directory
for the subdirectories containing the interface and wrapper files
needed to instantiate the SystemC design in the Verilog design.
Using GNU Compilers on Sun Solaris
On Solaris the default compiler is Sun Forte CC. You can specify a
different compiler with -cpp and -cc compile-time options. The
interface supports the gcc 3.3.6 (default) and 3.4.6 compilers.
If you use the -cpp g++ option on the syscan command line, you
must also use it on every command line that compiles C++ source.
For example:
syscan -cpp g++ sc_add.cpp:sc_add
syscan -cpp g++ sc_sub.cpp multiply.cpp display.cpp
vcs -cpp g++ -sysc top.v dev.v
If you use a full path to a C++ compiler, you have to supply the path
to the cc compiler on the VCS command line as well:
syscan -cpp /usr/bin/g++ sc_add.cpp:sc_add
syscan -cpp /usr/bin/g++ sc_sub.cpp multiply.cpp display.cpp