User guide

18-49
DirectC Interface
module Test;
reg [`FILE_NAME_SIZE*8:1] file_name;
// this file_name will be passed to the Verilog code that
expects
// a Verilog-like string
.
.
.
initial begin
s2v(FullPath("myStimulusFile"), file_name); // C-string to
Verilog-string
// bits of 'file_name' represent now 'Verilog string'
end
.
.
.
endmodule
The C code is as follows:
void s2v(vc_handle hs, vc_handle hv) {
vc_StringToVector((char *)vc_getPointer(hs), hv);
}
void vc_VectorToString(vc_handle, char *)
Converts a vector value to a string value.
int vc_getInteger(vc_handle)
Same as vc_toInteger.
void vc_putInteger(vc_handle, int)
Passes an int value by reference through a vc_handle to a scalar reg
or bit or a vector bit that is 32 bits or less. For example:
void putter (vc_handle h1, vc_handle h2, vc_handle h3,
vc_handle h4)