User guide

1-5
Getting Started
• DirectC Interface — this interface allows you to directly embed
user-created C/C++ functions within your Verilog design
description. This results in a significant improvement in
ease-of-use and performance over existing PLI-based methods.
VCS atomically recognizes C/C++ function calls and integrates
them for simulation, thus eliminating the need to manually create
PLI files.
• Incremental Verilog Compilation — reduces the turnaround time
from design modification by minimizing the amount of
recompilation. This capability enables VCS to automatically
compare the current design against the previously compiled
database; it then recompiles only those portions of the design that
have changed. For details, see “Incremental Compilation” on page
3-3.
• 64-Bit Cross-Compilation and Full 64-Bit Compilation — VCS
offers a choice of methodologies for high-capacity compilation
and simulation. Its -comp64 option invokes a cross-compilation
process that compiles a design on a 64-bit machine, which can
then be simulated on a 32-bit machine. The -full64 option both
compiles and simulates a design on a 64-bit machine.
• Mixed Signal Simulation — Synopsys provides the Discovery
AMS: NanoSim-VCS User Guide and the Discovery AMS:
Enhanced NanoSim-VCS User Guide to NanoSim and VCS users
who need to do mixed signal simulation. See “Accessing the
Discovery AMS Documentation” on page 1-20.