User guide

18-16
DirectC Interface
For long vectors the chunk for the least significant bits come first,
followed by the chunks for the more significant bits.
Figure 18-5 Storing Vector Values of More Than 32 Bits
In an element in a Verilog memory, for each eight bits in the element
there is a data byte and a control byte with an additional set of bytes
for remainder bit, so if a memory had 9 bits it would need two data
bytes and two control bytes. If it had 17 bits it would need three data
bytes and three control bytes. All the data bytes precede the control
bytes. Two-state memories have both data and control bytes but the
bits in the control bytes always have a zero value.
Figure 18-6 Storing Verilog Memory Elements in Machine Memory
control
data
data
four state
two state
control
data
data data data
Chunk for the least significant bits
012345
data data data
control control control