User guide

18-6
DirectC Interface
If a C/C++ function returns a value to a Verilog register (the C/C++
function is in an expression that is assigned to the register) the return
value of the C/C++ function is restricted to the following:
• The value of a scalar reg or bit
Note:
In two state simulation a reg has a new name, bit.
• The value of the C type int
• A pointer
• A short, 32 bits or less, vector bit
• The value of a Verilog real which is represented by the C type
double
So C/C++ functions cannot return the value of a four-state vector reg,
long (longer than 32 bits) vector bit, or Verilog integer,
realtime, or time data type. You can pass these type of values
out of the C/C++ function using a parameter that you declare to be
inout or output in the declaration of the function in your Verilog code.
Declaring the C/C++ Function
A partial EBNF specification for external function declaration is as
follows:
source_text ::= description +
description ::= module | user_defined_primitive | extern_declaration
extern_declaration ::= extern access_mode ? attribute ? return_type function_id
(extern_func_args ? ) ;
access_mode ::= ( "A" | "C" )