User guide

16-10
SWIFT VMC Models and SmartModels
This example enables the monitoring of all window regs in the module
instance for the model with the hierarchical name
test.design.xc4062xl_432_1.
Example 2
$swift_window_monitor_on("test.design.xc4062xl_432_1",
"GEN_CCLK_SPEED","LENGTH_CNT_WIDTH");
This example enables the monitoring of the window regs
GEN_CCLK_SPEED and LENGTH_CNT_WIDTH in the module
instance test.design.xc4062xl_432_1.
After you enable monitoring or depositing with these system tasks
you must specify the monitoring with, for example, the $monitor
system task, and depositing values with procedural assignments to
these window regs.
Using LMTV SmartModel Window Commands
VCS supports a number of the Logic Model to Verilog (LMTV)
SmartModel window commands that were implemented as a
command interface between SmartModels and the previous
generation of Verilog simulators. These commands are user-defined
system tasks that we provide for simulating with SmartModels. They
also work with VMC models.
These system tasks are as follows:
$lm_monitor_enable
Enables SmartModel windows for one or more window elements
in a specified model instance. This system task is functionally