User guide

16-4
SWIFT VMC Models and SmartModels
HP Platform
For the HP platform, set the SHLIB_PATH environment variable. If
you have already set this environment variable for some other
application, you can add to the definition of this environment variable
as follows:
setenv SHLIB_PATH ${LMC_HOME}/lib/hp700.lib:${SHLIB_PATH}
If you haven’t already set this environment variable, enter the
following
setenv SHLIB_PATH ${LMC_HOME}/lib/hp700.lib
Linux
For the Linux platform, set the LD_LIBRARY_PATH environment
variable as follows:
% setenv LD_LIBRARY_PATH $LMC_HOME/lib/
x86_linux.lib:$LD_LIBRARY_PATH
Generating Verilog Templates
You can generate the Verilog template for the model using the
-lmc-swift-template option. The vcs command line to do this
is as follows:
vcs -lmc-swift-template modelname