User guide

14-15
Negative Timing Checks
dff dff1(q, clk, d, rst);
initial begin
$monitor($time,,clk,,d,,q);
rst = 0; clk = 0; d = 0;
#100 clk = 1;
#100 clk = 0;
#10 d = 1;
#90 clk = 1;
#1 clk = 0; // width violation
#100 $finish;
end
endmodule
module dff(q, clk, d, rst);
output q;
input clk, d, rst;
reg notif;
DFF_UDP(q, d_clk, d_d, d_rst, notif);
specify
$setuphold(posedge clk, d, -10, 20, notif, , , d_clk,
d_d);
$setuphold(posedge clk, rst, 10, 10, notif, , , d_clk,
d_rst);
$width(posedge clk, 5, 0, notif);
endspecify
endmodule
primitive DFF_UDP(q,data,clk,rst,notifier);
output q; reg q;
input data,clk,rst,notifier;
table
// clock data rst notifier state q
// ------------------------------
r 0 0 ? : ? : 0 ;
r 1 0 ? : ? : 1 ;
f ? 0 ? : ? : - ;
? ? r ? : ? : 0 ;
? * ? ? : ? : - ;