User guide

14-2
Negative Timing Checks
• How VCS Calculates Delays
• Using Multiple Non-Overlapping Violation Windows
The Need for Negative Value Timing Checks
Negative Timing Checks for XYZ
The $setuphold timing check defines a timing violation window of
a specified amount of simulation time before and after a reference
event, such as a transition on some other signal like a clock signal,
in which a data signal must remain constant. A transition on the data
signal, called a data event, during the specified window is a timing
violation. For example:
$setuphold (posedge clock, data, 10, 11, notifyreg);
Here VCS reports the timing violation if there is a transition on signal
data less that 10 time units before, or less than 11 time units after,
a rising edge on signal clock. When there is a timing violation VCS
toggles a notifier register, in this example reg notifyreg. You could
use this toggling of a notifier register to output an X value from a
device, such as a sequential flop, when there is a timing violation.