User guide

13-7
SDF Backannotation
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The following is the vcs command line that compiles both the Verilog
source file and the SDF file:
vcs +compsdf ex.v
You do not have to specify the ex.sdf file, or any SDF table file, on
the vcs command line. When VCS compiles the SDF file it creates
binary data files in the simv.daidir directory. VCS reads these
binary files when it executes the $sdf_annotate system task.
Precompiling an SDF File
Whenever you compile your design, if your design backannotates
SDF data, VCS parses either the ASCII text SDF file or the
precompiled version of the ASCII text SDF file that VCS can make
from the original ASCII text SDF file. VCS does this even if the SDF
file is unchanged and already compiled into a binary version by a
previous compilation, and even when you are using incremental
compilation and the parts of the design backannotated by the SDF
file are unchanged.
VCS can parse the precompiled SDF file much faster than it can parse
the ASCII text SDF file, so for large SDF files it’s a good idea to have
VCS create a precompiled version of the SDF file.
Creating the Precompiled Version of the SDF file
To create the precompiled version of the SDF file, include the
+csdf+precompile option on the vcs command line.