User guide

11-7
Race Detection
The following is the source file, with line numbers added, for this race
condition report:
1. module test;
2. reg a,b,c,d;
3.
4. always @(a or b)
5. c = a & b;
6.
7. always
8. begin
9. a = 1;
10. #1 a = 0;
11. #2;
12. end
13.
14. always
15. begin
16. #1 a = 1;
17. d = b | c;
18. #2;
19. end
20.
21. initial
22. begin
23. $display("%m c = %b",c);
24. #2 $finish;
25. end
26. endmodule
As stipulated in race.out:
• At simulation time 0 there is a procedural assignment to reg c on
line 5 and also $display system task displays the value of reg
c on line 23.
• At simulation time 1 there is a procedural assignment to reg a on
line 10 and another procedural assignment to reg a on line 16.