User guide

7-22
VCD and VPD File Utilities
This source file uses significantly less code to apply the same stimulus
with the instance of module passer omitted.
If we revise the vgen.cfg file to have vcat do module generation, the
generated source file, moduleGeneration__top_ad1.v, is as follows:
module adder (out,in1,in2) ;
input in2 ;
input in1 ;
output [1:0] out ;
reg [1:0] out ;
initial begin
#0 out = 2’bxx;
#10 out = 2’b00;
#10 out = 2’b01;
#10 out = 2’b10;
#10 out = 2’b01;
#10 out = 2’b00;
#10 out = 2’b01;
#10 out = 2’b10;
#10 out = 2’b01;
#10 out = 2’b00;
#10 out = 2’b01;
#10 out = 2’b10;
#10 out = 2’b01;
#10 out = 2’b00;
end
endmodule
Notice that the input ports are stubbed and the values from the VCD
file are assigned directly to the output port.