User guide

7-20
VCD and VPD File Utilities
#10 r1=1;
#10 r2=1;
#10 r1=0;
#10 r2=0;
#100 $finish;
end
passer pa1 (int1,int2,r1,r2);
adder ad1 (result,int1,int2);
endmodule
module passer (out1,out2,in1,in2);
input in1,in2;
output out1,out2;
assign out1=in1;
assign out2=in2;
endmodule
module adder (out,in1,in2);
input in1,in2;
output [1:0] out;
reg r1,r2;
reg [1:0] sum;
always @ (in1 or in2)
begin
r1=in1;
r2=in2;
sum=r1+r2;
end
assign out=sum;
endmodule