User guide

7-18
VCD and VPD File Utilities
The name of the generated source file from testbench generation
begins with testbench followed by the module and instance names
in the hierarchical name of the module instance, separated by
underscores. For example testbench_top_ad1.v.
Similarly, the name of the generated source file from module
generation begins with moduleGeneration followed by the module
and instance names in the hierarchical name of the module instance,
separated by underscores. For example
moduleGeneration_top_ad1.v.
You enable vcat to generate these files by doing the following:
1. Writing a configuration file.
2. Running vcat with the -vgen command line option.
Writing the Configuration File
The configuration file is named vgen.cfg by default and vcat looks for
it in the current directory. This file needs three types of information
specified in the following order:
1. The hierarchical name of the module instance.
2. Specification of testbench generation with the keyword
testbench or specification of module generation with the
keyword moduleGeneration.
3. The module header and the port declarations from the module
definition of the module instance.
You can use Verilog comments in the configuration file.