User guide

3-35
Compiling and Elaborating Your Design
Compiling With Radiant Technology
You specify Radiant Technology optimizations at compile time.
Radiant Technology has the following compile-time options:
+rad
Specifies using Radiant Technology
+optconfigfile
Specifies applying Radiant Technology optimizations to part of the
design using a configuration file. See “Applying Radiant
Technology to Parts of the Design” on page 3-36.
Known Limitations
Radiant Technology is not applicable to all simulation situations.
Some features of VCS are not available when you use Radiant
Technology.
These limitations are:
Backannotating SDF Files
You cannot use Radiant Technology if your design backannotates
delay values from either a compiled or an ASCII SDF file at
runtime.
SystemVerilog
Radiant Technology does not work with SystemVerilog design
construct code, for example, structures and unions, new types of
always blocks, interfaces, or things defined in $root.