User guide

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Negative Timing Checks for XYZ. . . . . . . . . . . . . . . . . . . . . . 14-2
The $setuphold Timing Check Extended Syntax . . . . . . . . . . 14-7
Negative Timing Checks for Asynchronous Controls. . . . . . . 14-10
The $recrem Timing Check Syntax . . . . . . . . . . . . . . . . . . . . 14-11
Enabling Negative Timing Checks. . . . . . . . . . . . . . . . . . . . . . . . 14-13
Other Timing Checks Using the Delayed Signals . . . . . . . . . . . . 14-14
Checking Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-18
Toggling the Notifier Register . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-19
SDF Backannotation to Negative Timing Checks . . . . . . . . . . . . 14-19
How VCS Calculates Delays . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-20
Using Multiple Non-Overlapping Violation Windows . . . . . . . . . . 14-23
15. SAIF Support
Using SAIF Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-2
SAIF System Tasks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-2
Typical Flow to Dump the Backward SAIF File using System Tasks 15-5
Criteria for Choosing Signals for SAIF Dumping . . . . . . . . . . . . . 15-6
16. SWIFT VMC Models and SmartModels
SWIFT Environment Variables . . . . . . . . . . . . . . . . . . . . . . . . . . 16-2
Generating Verilog Templates . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-4
Modifying the Verilog Template File . . . . . . . . . . . . . . . . . . . . 16-5
Monitoring Signals in the Model Window . . . . . . . . . . . . . . . . . . 16-8