User guide

C-56
Compile-Time Options
Options for Mixed Analog/Digital Simulation
+ad=partition_filename
Specifies the partition file that you use in mixed Analog/Digital
simulation to specify the part of the design simulated by the analog
simulator, the analog simulator you want to use, and the
resistance mapping information that maps analog drive resistance
ranges to Verilog strengths.
-ams_discipline discipline_name
Specifies the default discrete discipline in VerilogAMS.
-ams_iereport
If information on auto-inserted connect modules (AICMs) is
available, displays this information on the screen and in the log file.
+bidir+1
Tells VCS to finish compilation when it finds a bidirectional
registered mixed-signal net.
+print+bidir+warn
Tells VCS to display a list of bidirectional, registered, mixed signal
nets.
Options for Changing Parameter Values
-pvalue+parameter_hierarchical_name=value
Changes the specified parameter to the specified value. See
“Changing Parameter Values From the Command Line” on page
3-12.