User guide

3-21
Compiling and Elaborating Your Design
"source_file.v", line_number: signal[bit]
Like the warning message, the error message includes the module
name where the access occurs, the source file name, the line number,
and the signal name and bit that is outside the declared range, or the
memory or array and the undeclared element.
If you access an element that is not in the declared range of a memory
or a multidimensional array, and include the +vcs+boundscheck
compile-time option, VCS displays the previous error message as
well as the following error message:
Error - [IRIMW] Illegal range in memory word
Illegal range in memory word shown below
"source_file.v", line_number: memory[element]
[element]...
Compiling Runtime Options Into the simv Executable
You can enter some runtime options on the vcs command line or in
the file that you specify with the -f or -F compile-time option and
VCS compiles these runtime options into the simv executable so you
do not need to specify them at runtime.
The runtime options that you can simply enter on the vcs command
line or in the file that you specify with the -f or -F compile-time options
are as follows:
+cliecho +no_pulse_msg
+sdverbose +vcs+finish
+vcs+flush+all +vcs+flush+dump
+vcs+flush+fopen +vcs+flush+log