User guide

24-236
SystemVerilog Testbench Constructs
bins s2 = { 4 };
bins s3 = { 5 };
bins s4 = { 6 };
bins s5 = { 7 };
}
endgroup
covType cov1;
initial begin
repeat (10) begin
#5 clk = ~clk;
var = var + 1;
$display("var=%b covergae=%f\n", var,
cov1.get_coverage());
end
end
initial
begin
cov1 = new(2);
cov1.stop();
cov1.option.weight = 5;
#30 cov1.start();
end
endprogram
OUTPUT:
var=010 covergae=0.000000
var=011 covergae=0.000000
var=100 covergae=0.000000
var=101 covergae=0.000000
var=110 covergae=0.000000