User guide

3-6
Compiling and Elaborating Your Design
The chip designer needs to know what debug features the board
designer needs in the chip design. The chip designer meets the board
designer and learns that the board designer needs to dump the
signals in a memory submodule in the chip design, so the chip
designer adds a $dumpvars system task to the chip design:
$dumpvars(0,asic.memory);
The chip designer now compiles the chip design using the following
vcs command line:
% vcs -Mdir=path_to_shared_directory other_options
source_files_for_the_chip_design
The chip designer includes the -Mdir option specifying a directory
pathname into which VCS writes the generated files and makes sure
that the board designer can access this directory.
The board designer first copies the source files for the chip design
from the chip designer and then compiles the board design with the
following command line:
% vcs -Mdir=local_dir -Mlib=path_to_shared_directory
other_options source_files_for_the_chip_design
source_files_for_the_board_design
VCS does not recompile the chip design because the board designer
included the -Mlib option telling VCS where to look for descriptor
information to compare to the chip design source files. This descriptor
information tells VCS that it doesn’t need to recompile the chip design
so VCS uses the generated files in this directory to create the simv
executable for simulating the board design