User guide

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SystemVerilog Testbench Constructs
F : {$write ("F");};
G : {$write ("G");};
endsequence
end
endprogram
Production Controls
SystemVerilog provides several mechanisms that can be used to
control productions: weights for randomization, if-else statements,
case statements, and repeat loops.
This section includes:
Weights for Randomization
if-else Statements
case Statements
repeat Loops
break Statement
Weights for Randomization
Weights can be assigned to production items to change the
probability that they are selected when the randsequence block is
called.
Syntax
rs_production_list[:= weight_specification [rs_code_block] ]