User guide

24-117
SystemVerilog Testbench Constructs
randcase
a+3 : count_2++; // simple add expression as weight
10 : count_c++; // constant used as weight
endcase
endfunction
initial begin
repeat (15)
f1();
$display("Number of times a+3 called is %0d", count_2);
$display("Number of times constant called is %0d",
count_c);
end
endprogram
The output of this program is:
Number of times a+3 called is 5
Number of times constant called is 10
This example defines a randcase block of two statements with
different weights (one as an expression and another as an integer).
The probability that any single statement will be selected for execution
is determined by the formula weight/total_weight. Therefore, in this
example, the probability of the first statement being executed is 0.33,
and the second statement is 0.66.
Random Sequence Generation
Note:
Random sequence generation is an LCA feature.