User guide

24-108

SystemVerilog Testbench Constructs

bb.addr = 121,, bb.data = 219

========one random variable ON========

bb.addr = 121,, bb.data = 456

bb.addr = 121,, bb.data = 511

bb.addr = 121,, bb.data = 67

bb.addr = 121,, bb.data = 316

bb.addr = 121,, bb.data = 405

======both random variables ON =======

bb.addr = 18,, bb.data = 491

bb.addr = 231,, bb.data = 113

bb.addr = 118,, bb.data = 230

bb.addr = 46,, bb.data = 96

bb.addr = 155,, bb.data = 298

In-line Constraints

You can use the randomize() method and the with construct to

declare in-line constraints outside of the class for the random

variables, at the point where you call the randomize() method.

program prog;

class Bus;

rand bit [2:0] bitrand1;

endclass

Bus bus = new;

task inline (Bus bus);

int int1;