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24-104
SystemVerilog Testbench Constructs
else
$display("Error with constraint_mode");
generateRandomAddresses(`N);
// turn OFF "word_align" constraint in "bb"
bb.word_align.constraint_mode(0);
$display("=========one constraint ON =======");
generateRandomAddresses(`N);
// turn OFF all constraints in "bb"
bb.constraint_mode(0);
$display("=========both constraints OFF =======");
generateRandomAddresses(`N);
// turn ON "addr_range" constraint in "bb"
bb.addr_range.constraint_mode(1);
$display("=========one constraint ON =======");
generateRandomAddresses(`N);
// turn ON all constraint in "bb"
bb.constraint_mode(1);
$display("=========both constraints ON =======");
generateRandomAddresses(`N);
end
endprogram
Output of the above program:
=========both constraints ON =======
bb.addr = 14
bb.addr = 2
bb.addr = 4
bb.addr = 8
bb.addr = 2
=========one constraint ON =======
bb.addr = 2
bb.addr = 9
bb.addr = 9
bb.addr = 9
bb.addr = 3
=========both constraints OFF =======
bb.addr = 44051