User guide

24-103
SystemVerilog Testbench Constructs
Syntax:
task object[.constraint_identifier]::constraint_mode
(bit ON | OFF);
or
function int
object.constraint_identifier::constraint_mode();
In the following example, there are two constraint blocks defined in
a class, bus. The constraint_mode() method, when used as a task,
turns on and off the word_align and addr_range constraints.
constraint_mode() is also being used as a function to report the ON/
OFF value of the two constraints.
‘define N 5
program test;
class bus;
rand bit [15:0] addr;
constraint word_align {addr[0] == 1'b0;}
constraint addr_range{addr >= 0 && addr <= 15;}
endclass
task generateRandomAddresses(integer how_many);
integer i;
for(i = 1; i <= how_many; i++) begin
bb.randomize();
$display("bb.addr = %d",bb.addr);
end
endtask
bus bb = new;
initial begin
// By default all constraints are ON
if (bb.word_align.constraint_mode() &&
bb.addr_range.constraint_mode())
begin
$display("======both constraints ON ======");
end