User guide

24-71
SystemVerilog Testbench Constructs
log1 = 1 log2=2 log3=0 log4=0
log1 = 2 log2=0 log3=1 log4=1
log1 = 1 log2=1 log3=1 log4=3
log1 = 3 log2=2 log3=1 log4=0
log1 = 3 log2=2 log3=3 log4=3
log1 = 3 log2=1 log3=0 log4=2
log1 = 1 log2=1 log3=1 log4=1
log1 = 2 log2=0 log3=2 log4=3
log1 = 1 log2=0 log3=2 log4=0
The possible values of all the random variables range from 3 to 0,
but the values of log1 are never 0, and the values of log2 are never
greater than 3. VCS can assign the same value to log3 over again,
but never assigns the same value to log4 over again until it has cycled
through all the other legal values.
By means of in-line constraints, a constraint block can be declared
for random variables declared in a class while calling the randomize()
method on that class’ object. (See section entitled “In-line
Constraints“ on page 108).
program test;
class base;
rand int r_a;
endclass
base b = new;
initial begin
int ret;
ret = b.randomize with {r_a > 0; r_a <= 10;} ;
// where my declaration {r_a >0 ; r_a <= 10; }
// is now a constraint block
if(ret == 1)
$display("Randomization success");
else
$display("Randomization Failed");
end
endprogram