User guide

24-55
SystemVerilog Testbench Constructs
super keyword
The super keyword is used from within a derived class to refer to
properties of the parent class. It is necessary to use super when the
property of the derived class has been overridden, and cannot be
accessed directly.
program sample;
class Base;
integer p;
virtual task display();
$display("\nBase: p=%0d", p);
endtask
endclass
class Extended extends Base;
integer q;
task display();
super.display(); //refer to Base "display()"
$display("\nExtended: q=%0d\n", q);
endtask
endclass
Base b1;
Extended e1;
initial begin
b1 = new; // b1 points to instantiated object of Base
e1 = new; // e1 points to object of Extended
b1.p = 1; //property "p" of Base initialized to 1
b1.display(); //will print out "Base: p=1"
e1.p = 2; //"p" of Base is now 2
e1.q = 3; //"q" of Extended initialized to 3
e1.display(); //prints "Base: p=2 Extended: q=3"
end
endprogram
Output of the above program is:
Base: p=1