User guide

18-7
Translating VCD and VCD+
VHDL Mapping
The following VHDL constructs are mapped for translation from VPD
to VCD. Additional VHDL constructs can be pseudo mapped using
the +morevhdl switch (see
VHDL Mapping). Using the +morevhdl
switch allows you to view the additional VHDL constructs, but there
may be inaccuracies in the pseudo mapped signals, and you cannot
translate a VCD file that uses pseudo mapping back into a VPD file.
Table 18-4 Mapping of VHDL Constructs for Translation to VCD
VHDL Construct vpd2vcd Mapping
package module
entity module, task
process function (always or initial statement)
block begin
bit wire
Std_logic n wire n/4 (n is an integer divisible by 4)
Integer integer
real real
time time
boolean wire
character wire 8
enum integer
arrays wire/integer/real