User guide

17-18
VCD+ (vpd) File Generation
• Source Statement System Tasks
How to Capture Verilog Source Statement Execution
Figure 17-7 shows three ways to capture source statement execution.
Figure 17-7 Three Ways of Capturing Verilog Source Statement Execution
Source File (.v)
VCD+ File
VCD+ File
Source File (.v)
3. For viewing in interactive mode in the VirSim Source Window,
2. For viewing in post simulation mode, enter the appropriate trace task at the simulator
Source
Execution
Data
Source
Execution
Data
command line.
Capture Line Data must be enabled (enabled by default).
mode, include the appropriate trace task in the source file.
Simulator
PLI
Simulator
PLI
>$vcdplustraceon
$vcdplustraceon;
//
$vcdpluson;
To also generate a VCD+ file for viewing in post simulation
>$vcdpluson
1. For viewing in post simulation mode, include $vcdplustraceon.