Technical data

4 Programming Model
PMCspan PMC Carrier Module Installation and Use (6806800A59B)
21
54h Serial EEPROM Data Serial
EEPROM
Address
Serial
EEPROM
Control
Yes No
58h-63h Reserved No No
64h GPIO [3:0]
Input Data
GPIO [3:0]
Output Enable
GPIO [3:0]
Output Data
P_SERR#
Event Disable
Yes No
68h Reserved P_SERR#
Status
Secondary Clock Control Yes No
6Ch-96h Reserved No No
9Ch Reserved Read Only
Register
Control
Yes No
A0h-D8h Reserved Yes No
DCh Power Management Capabilities* Power
Management
Next Capability
Pointer (E4h)
Power
Management
Capability ID
(01h)
Yes Yes
E0h Power
Mannagement
Data*
PMCSR Bridge
Suports
Extensions
Power Management
Control/Status*
Yes Yes
E4h Reserved Hot Swap
Control/Status
(0h)
Hot Swap Next
Capability
Pointer (E8h)
Hot Swap
Control
(Capability ID)
06h
Yes No
E8h VPD Address (0h) VPD Next
Capability
Pointer (00h)
VPD Capability
ID (03h)
Yes No
ECh VPD Data (0h) Yes No
Table 4-1. PLX PCI6150 PCI Configuration Register Address Mapping
PCI
Configuration
Register
Address
PC
Writable
Serial
EEPROM
Writable
31 24 23 16 15 8 70
Notes: *Writable only when the Read-Only Register’s Write Enable bit is set
(RRC[7]=1;PCI:9Ch).
Writes to Reserved locations have no effect.
Reads of Reserved locations return zeros.
To ensure software compatibility with other versions of the PCI 6150 family and to ensure
future compantibility, write zeros to all unused bits..
Refer to the individual register descriptions to determine which bits are writable.