Technical data

Programming Details
MVME4100 Single Board Computer Programmer’s Reference (6806800H19B)
64
4.10 Flash Memory
The MVME4100 is designed to provide 128 MB of soldered-on NOR flash memory. Two +3.0 V
devices are configured to operate in 16-bit mode to form a 32-bit flash bank. This flash bank is
also the boot bank and is connected to LBC Chip Select 0 and 1. The NOR flash is accessed via
the MPC8548E local bus. The next table shows memory size and device IDs.
A hardware Flash Bank write-protect switch is provided on the MVME4100 to enable write
protection of the NOR flash. Regardless of the state of the software flash write-protect bit in
the NOR Flash Control/Status register, write protection is enabled when this switch is ON.
When the switch is OFF, write protection is controlled by the state of the software flash write-
protect bits. It is only disabled by clearing this bit in the NOR Flash Control/Status register (refer
to section NOR Flash Control/Status Register on page 31). Note that the F_WP_HW bit reflects
the state of the switch and is only software readable whereas the F_WP_SW bit supports both
read and write operations.
Also included is one bank of NAND flash which is accessed via the MPC8548E local bus. The
next table shows the emory sizes and device IDs.
4.11 PCI/PCI-X Configuration
The next sections provide information that details the PCI/PCI-X configuration of the various
on-board PCI devices.
Table 4-6 NOR Flash Memory Configurations
Device Part Number Data Bus Width Bank Size Device Size Vendor ID Device ID
S29GL512P10 32 bits 128 MB 512 megabit AMD-
0001h
7E23h
Table 4-7 NAND Flash Memory Configurations
Device Part Number Data Bus Width Bank Size Device Size Vendor ID Device ID
K9WBG08U1M 8 bits 4 GB 4 GB Samsung = ECh D7h