Technical data

Programming Details

MVME4100 Single Board Computer Programmer’s Reference (6806800H19B)

4.4 Local Bus Controller Chip Select Assignments

The following table shows local bus controller (LBC) bank and chip select assignments for the

MVME4100 board.

1. Flash bank size determined by VPD flash packet.

2. Control/Status registers are byte read and write capable.

3. 32-bit timer registers are byte readable, but must be written as 32 bits.

4. MRAM is byte read and write capable.

Table 4-3 LBC Chip Select Assignments

LBC Bank / Chip Select Local Bus Function Size Data Bus Width Notes

0 Boot flash bank 128 MB 32 bits 1

1 Boot flash bank 128 MB 32 bits 1

2 NAND flash bank 64 KB 8 bits -

3 MRAM 512 KB 16 bits 4

4 Control/status registers 64 KB 32 bits 2

5 Quad UART 64 KB 8 bits -

6 32-bit Timers 64 KB 32 bits 3

7Not Used---